JOB DESCRIPTION We are seeking a Senior ASIC Frontend to drive the architectural implementation and testability of our next-generation SoCs. You will be responsible for taking high-level specifications through RTL coding and ensuring that the final silicon is fully testable and reliable.
GENERAL QUALIFICATIONS · Bachelor’s or MSc in Electric-Electronics Engineering, Computer Engineering, Microelectronics, or related field (PhD is plus). · 3+ years of hands-on ASIC design experience. · Proven track record of leading complex ASIC projects from concept to production. · Strong expertise in VHDL, Verilog and System Verilog. · Deep understanding of ASIC flow (Synthesis, P&R, DFT, STA). · Lead the insertion and validation of DFT structures, including Scan chains, MBIST (Memory Built-In Self-Test), and LBIST (Logic Built-In Self-Test). · Knowledge of high-speed interfaces (PCIe, DDR, Ethernet, SerDes) and DSP/AI/ML accelerators is highly desirable. · Familiarity with scripting (Python, TCL, Perl, etc.) for automation.
ADDITIONAL QUALIFICATIONS · Having knowledge/experience about ARM/RISC-V system architectures and bus protocols (AMBA AXI/AHB). · Knowledge of post-silicon debug and ATE (Automated Test Equipment) requirements. · Strong communication and collaboration skills across technical and non-technical teams.
شرکت فناوری اطلاعات همراه رسپینا رادین از سال 89 شروع به کار کرده است و دارای رتبه 4 شورای عالی انفورماتیک کشور در عرصه تولید نرم افزارهای سفارش مشتری می باشد. زمینه ی اصلی فعالیت شرکت تولید نرم افزارهای سازمانی تحت وب می باشد.